zhao/target_linux_rockchip-6.x
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patches-6.1: refresh patches

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Signed-off-by: sbwml <admin@cooluc.com>
This commit is contained in:
sbwml 2023-12-17 23:45:01 +08:00
parent 01e3aa4788
commit 13a8d9338f
5 changed files with 6 additions and 18 deletions
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6
patches-6.1/012-rk356x-add-dwc3-xhci-usb-trb-quirk.patch
View File

@ -18,7 +18,7 @@
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1535,6 +1535,8 @@ static void dwc3_get_properties(struct d
@@ -1654,6 +1654,8 @@ static void dwc3_get_properties(struct d
"snps,dis-del-phy-power-chg-quirk");
dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev,
"snps,dis-tx-ipgap-linecheck-quirk");
@ -29,7 +29,7 @@
dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev,
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1095,6 +1095,9 @@ struct dwc3_scratchpad_array {
@@ -1104,6 +1104,9 @@ struct dwc3_scratchpad_array {
* change quirk.
* @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate
* check during HS transmit.
@ -39,7 +39,7 @@
* @resume-hs-terminations: Set if we enable quirk for fixing improper crc
* generation after resume from suspend.
* @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
@@ -1314,6 +1317,7 @@ struct dwc3 {
@@ -1327,6 +1330,7 @@ struct dwc3 {
unsigned dis_u2_freeclk_exists_quirk:1;
unsigned dis_del_phy_power_chg_quirk:1;
unsigned dis_tx_ipgap_linecheck_quirk:1;

2
patches-6.1/107-mmc-core-set-initial-signal-voltage-on-power-off.patch
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@ -24,7 +24,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1366,6 +1366,8 @@ void mmc_power_off(struct mmc_host *host
@@ -1371,6 +1371,8 @@ void mmc_power_off(struct mmc_host *host
mmc_pwrseq_power_off(host);

2
patches-6.1/411-arm64-dts-rockchip-rk3399-Enable-DFI.patch
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@ -14,7 +14,7 @@ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1331,7 +1331,6 @@
@@ -1315,7 +1315,6 @@
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_DDR_MON>;
clock-names = "pclk_ddr_mon";

2
patches-6.1/412-arm64-dts-rockchip-rk356x-Add-DFI.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -959,6 +959,13 @@
@@ -956,6 +956,13 @@
reg = <0x0 0xfe1a8100 0x0 0x20>;
};

12
patches-6.1/991-fix-arm64-kvm-for-openwrt.patch
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@ -1,12 +0,0 @@
--- a/arch/arm64/kvm/hyp/nvhe/gen-hyprel.c
+++ b/arch/arm64/kvm/hyp/nvhe/gen-hyprel.c
@@ -286,7 +286,9 @@ static void init_elf(const char *path)
assert_eq(elf.ehdr->e_ident[EI_CLASS], ELFCLASS64, "%u");
assert_eq(elf.ehdr->e_ident[EI_DATA], ELFENDIAN, "%u");
assert_eq(elf16toh(elf.ehdr->e_type), ET_REL, "%u");
+#ifdef EM_AARCH64
assert_eq(elf16toh(elf.ehdr->e_machine), EM_AARCH64, "%u");
+#endif
/* Populate fields of the global struct. */
elf.sh_table = section_by_off(elf64toh(elf.ehdr->e_shoff));