rockchip: update dts for nanopi r5s

Signed-off-by: sbwml <admin@cooluc.com>
This commit is contained in:
sbwml 2024-11-26 23:24:00 +08:00
parent dd5a77edf8
commit 4d6fb5ddf5
3 changed files with 10 additions and 22 deletions

View File

@ -14,24 +14,12 @@
fan: pwm-fan { fan: pwm-fan {
compatible = "pwm-fan"; compatible = "pwm-fan";
cooling-levels = <0 18 102 170 255>; cooling-levels = <0 18 60 100 255>;
#cooling-cells = <2>; #cooling-cells = <2>;
fan-supply = <&vcc5v0_sysp>; fan-supply = <&vcc5v0_sysp>;
pwms = <&pwm0 0 50000 0>; pwms = <&pwm0 0 50000 0>;
}; };
gpio-key {
compatible = "gpio-key";
pinctrl-names = "default";
pinctrl-0 = <&key1_pin>;
button@1 {
debounce-interval = <50>;
gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
wakeup-source;
};
};
gpio-leds { gpio-leds {
compatible = "gpio-leds"; compatible = "gpio-leds";

View File

@ -39,7 +39,7 @@
* @resume_hs_terminations: Set if we enable quirk for fixing improper crc * @resume_hs_terminations: Set if we enable quirk for fixing improper crc
* generation after resume from suspend. * generation after resume from suspend.
* @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
@@ -1366,6 +1369,7 @@ struct dwc3 { @@ -1368,6 +1371,7 @@ struct dwc3 {
unsigned dis_u2_freeclk_exists_quirk:1; unsigned dis_u2_freeclk_exists_quirk:1;
unsigned dis_del_phy_power_chg_quirk:1; unsigned dis_del_phy_power_chg_quirk:1;
unsigned dis_tx_ipgap_linecheck_quirk:1; unsigned dis_tx_ipgap_linecheck_quirk:1;
@ -73,7 +73,7 @@
} }
--- a/drivers/usb/host/xhci-ring.c --- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c
@@ -3563,6 +3563,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * @@ -3555,6 +3555,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
bool more_trbs_coming = true; bool more_trbs_coming = true;
bool need_zero_pkt = false; bool need_zero_pkt = false;
bool first_trb = true; bool first_trb = true;
@ -81,7 +81,7 @@
unsigned int num_trbs; unsigned int num_trbs;
unsigned int start_cycle, num_sgs = 0; unsigned int start_cycle, num_sgs = 0;
unsigned int enqd_len, block_len, trb_buff_len, full_len; unsigned int enqd_len, block_len, trb_buff_len, full_len;
@@ -3599,6 +3600,13 @@ int xhci_queue_bulk_tx(struct xhci_hcd * @@ -3591,6 +3592,13 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->num_tds > 1) if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->num_tds > 1)
need_zero_pkt = true; need_zero_pkt = true;
@ -95,7 +95,7 @@
td = &urb_priv->td[0]; td = &urb_priv->td[0];
/* /*
@@ -3627,6 +3635,13 @@ int xhci_queue_bulk_tx(struct xhci_hcd * @@ -3619,6 +3627,13 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
first_trb = false; first_trb = false;
if (start_cycle == 0) if (start_cycle == 0)
field |= TRB_CYCLE; field |= TRB_CYCLE;
@ -109,7 +109,7 @@
} else } else
field |= ring->cycle_state; field |= ring->cycle_state;
@@ -3635,6 +3650,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd * @@ -3627,6 +3642,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
*/ */
if (enqd_len + trb_buff_len < full_len) { if (enqd_len + trb_buff_len < full_len) {
field |= TRB_CHAIN; field |= TRB_CHAIN;

View File

@ -105,7 +105,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
if (alloc_lpis) { if (alloc_lpis) {
lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis);
if (lpi_map) if (lpi_map)
@@ -4743,6 +4766,21 @@ static bool __maybe_unused its_enable_qu @@ -4759,6 +4782,21 @@ static bool __maybe_unused its_enable_qu
return true; return true;
} }
@ -127,7 +127,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
static bool __maybe_unused its_enable_rk3588001(void *data) static bool __maybe_unused its_enable_rk3588001(void *data)
{ {
struct its_node *its = data; struct its_node *its = data;
@@ -4813,6 +4851,12 @@ static const struct gic_quirk its_quirks @@ -4829,6 +4867,12 @@ static const struct gic_quirk its_quirks
#endif #endif
#ifdef CONFIG_ROCKCHIP_ERRATUM_3588001 #ifdef CONFIG_ROCKCHIP_ERRATUM_3588001
{ {
@ -140,7 +140,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
.desc = "ITS: Rockchip erratum RK3588001", .desc = "ITS: Rockchip erratum RK3588001",
.iidr = 0x0201743b, .iidr = 0x0201743b,
.mask = 0xffffffff, .mask = 0xffffffff,
@@ -5081,6 +5125,7 @@ static int __init its_probe_one(struct i @@ -5097,6 +5141,7 @@ static int __init its_probe_one(struct i
{ {
u64 baser, tmp; u64 baser, tmp;
struct page *page; struct page *page;
@ -148,7 +148,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
u32 ctlr; u32 ctlr;
int err; int err;
@@ -5116,7 +5161,9 @@ static int __init its_probe_one(struct i @@ -5132,7 +5177,9 @@ static int __init its_probe_one(struct i
} }
} }