rockchip: add pwm-fan controller for nanopi r2s/r4s

Signed-off-by: sbwml <admin@cooluc.com>
This commit is contained in:
sbwml 2024-12-02 10:47:33 +08:00
parent 4d6fb5ddf5
commit 97218a65c3
5 changed files with 108 additions and 18 deletions

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@ -0,0 +1,45 @@
From 508a0a0d4e2e7b547950b2adb15594a75654708f Mon Sep 17 00:00:00 2001
From: sbwml <admin@cooluc.com>
Date: Mon, 2 Dec 2024 10:34:33 +0800
Subject: [PATCH] rockchip: add pwm-fan controller for nanopi r2s/r4s
Signed-off-by: sbwml <admin@cooluc.com>
---
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 8 ++++++++
arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 8 ++++++++
2 files changed, 16 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -115,6 +115,14 @@
regulator-boot-on;
vin-supply = <&vdd_5v>;
};
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 18 60 100 255>;
+ #cooling-cells = <2>;
+ fan-supply = <&vdd_5v>;
+ pwms = <&pwm2 0 50000 0>;
+ };
};
&cpu0 {
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -69,6 +69,14 @@
regulator-always-on;
regulator-boot-on;
};
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 18 60 100 255>;
+ #cooling-cells = <2>;
+ fan-supply = <&vdd_5v>;
+ pwms = <&pwm1 0 50000 0>;
+ };
};
&emmc_phy {

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@ -18,7 +18,7 @@
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1614,6 +1614,8 @@ static void dwc3_get_properties(struct d
@@ -1620,6 +1620,8 @@ static void dwc3_get_properties(struct d
"snps,dis-del-phy-power-chg-quirk");
dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev,
"snps,dis-tx-ipgap-linecheck-quirk");
@ -39,7 +39,7 @@
* @resume_hs_terminations: Set if we enable quirk for fixing improper crc
* generation after resume from suspend.
* @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
@@ -1335,6 +1338,7 @@ struct dwc3 {
@@ -1337,6 +1340,7 @@ struct dwc3 {
unsigned dis_u2_freeclk_exists_quirk:1;
unsigned dis_del_phy_power_chg_quirk:1;
unsigned dis_tx_ipgap_linecheck_quirk:1;
@ -120,7 +120,7 @@
&trb_buff_len,
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1531,7 +1531,11 @@ static inline const char *xhci_trb_type_
@@ -1275,7 +1275,11 @@ static inline const char *xhci_trb_type_
#define TRB_SEGMENT_SIZE (TRBS_PER_SEGMENT*16)
#define TRB_SEGMENT_SHIFT (ilog2(TRB_SEGMENT_SIZE))
/* TRB buffer pointers can't cross 64KB boundaries */
@ -132,7 +132,7 @@
#define TRB_MAX_BUFF_SIZE (1 << TRB_MAX_BUFF_SHIFT)
/* How much data is left before the 64KB boundary? */
#define TRB_BUFF_LEN_UP_TO_BOUNDARY(addr) (TRB_MAX_BUFF_SIZE - \
@@ -1856,6 +1860,7 @@ struct xhci_hcd {
@@ -1600,6 +1604,7 @@ struct xhci_hcd {
#define XHCI_STATE_HALTED (1 << 1)
#define XHCI_STATE_REMOVING (1 << 2)
unsigned long long quirks;

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@ -0,0 +1,45 @@
From 508a0a0d4e2e7b547950b2adb15594a75654708f Mon Sep 17 00:00:00 2001
From: sbwml <admin@cooluc.com>
Date: Mon, 2 Dec 2024 10:34:33 +0800
Subject: [PATCH] rockchip: add pwm-fan controller for nanopi r2s/r4s
Signed-off-by: sbwml <admin@cooluc.com>
---
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 8 ++++++++
arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 8 ++++++++
2 files changed, 16 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -114,6 +114,14 @@
regulator-boot-on;
vin-supply = <&vdd_5v>;
};
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 18 60 100 255>;
+ #cooling-cells = <2>;
+ fan-supply = <&vdd_5v>;
+ pwms = <&pwm2 0 50000 0>;
+ };
};
&cpu0 {
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -69,6 +69,14 @@
regulator-always-on;
regulator-boot-on;
};
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 18 60 100 255>;
+ #cooling-cells = <2>;
+ fan-supply = <&vdd_5v>;
+ pwms = <&pwm1 0 50000 0>;
+ };
};
&emmc_phy {

View File

@ -18,7 +18,7 @@ Subject: [PATCH] net: phy: realtek: add LED configuration from OF for 8211f
#define RTL8211F_PHYCR1 0x18
#define RTL8211F_PHYCR2 0x19
#define RTL8211F_INSR 0x1d
@@ -376,6 +378,7 @@ static int rtl8211f_config_init(struct p
@@ -379,6 +381,7 @@ static int rtl8211f_config_init(struct p
struct rtl821x_priv *priv = phydev->priv;
struct device *dev = &phydev->mdio.dev;
u16 val_txdly, val_rxdly;
@ -26,7 +26,7 @@ Subject: [PATCH] net: phy: realtek: add LED configuration from OF for 8211f
int ret;
ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
@@ -451,6 +454,15 @@ static int rtl8211f_config_init(struct p
@@ -454,6 +457,15 @@ static int rtl8211f_config_init(struct p
return ret;
}

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@ -18,7 +18,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
#endif /* _IRQ_GIC_COMMON_H */
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2186,6 +2186,11 @@ static struct page *its_allocate_prop_ta
@@ -2192,6 +2192,11 @@ static struct page *its_allocate_prop_ta
{
struct page *prop_page;
@ -30,7 +30,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ));
if (!prop_page)
return NULL;
@@ -2308,6 +2313,7 @@ static int its_setup_baser(struct its_no
@@ -2314,6 +2319,7 @@ static int its_setup_baser(struct its_no
u64 baser_phys, tmp;
u32 alloc_pages, psz;
struct page *page;
@ -38,7 +38,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
void *base;
psz = baser->psz;
@@ -2320,7 +2326,10 @@ static int its_setup_baser(struct its_no
@@ -2326,7 +2332,10 @@ static int its_setup_baser(struct its_no
order = get_order(GITS_BASER_PAGES_MAX * psz);
}
@ -50,7 +50,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
if (!page)
return -ENOMEM;
@@ -2960,6 +2969,10 @@ static struct page *its_allocate_pending
@@ -2966,6 +2975,10 @@ static struct page *its_allocate_pending
{
struct page *pend_page;
@ -61,7 +61,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
pend_page = alloc_pages(gfp_flags | __GFP_ZERO,
get_order(LPI_PENDBASE_SZ));
if (!pend_page)
@@ -3308,7 +3321,12 @@ static bool its_alloc_table_entry(struct
@@ -3314,7 +3327,12 @@ static bool its_alloc_table_entry(struct
/* Allocate memory for 2nd level table */
if (!table[idx]) {
@ -75,7 +75,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
get_order(baser->psz));
if (!page)
return false;
@@ -3392,6 +3410,7 @@ static struct its_device *its_create_dev
@@ -3398,6 +3416,7 @@ static struct its_device *its_create_dev
unsigned long *lpi_map = NULL;
unsigned long flags;
u16 *col_map = NULL;
@ -83,7 +83,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
void *itt;
int lpi_base;
int nr_lpis;
@@ -3404,7 +3423,11 @@ static struct its_device *its_create_dev
@@ -3410,7 +3429,11 @@ static struct its_device *its_create_dev
if (WARN_ON(!is_power_of_2(nvecs)))
nvecs = roundup_pow_of_two(nvecs);
@ -96,7 +96,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
/*
* Even if the device wants a single LPI, the ITT must be
* sized as a power of two (and you need at least one bit...).
@@ -3412,7 +3435,7 @@ static struct its_device *its_create_dev
@@ -3418,7 +3441,7 @@ static struct its_device *its_create_dev
nr_ites = max(2, nvecs);
sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
@ -105,7 +105,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
if (alloc_lpis) {
lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis);
if (lpi_map)
@@ -4730,6 +4753,21 @@ static bool __maybe_unused its_enable_qu
@@ -4742,6 +4765,21 @@ static bool __maybe_unused its_enable_qu
return true;
}
@ -127,7 +127,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
static bool __maybe_unused its_enable_rk3588001(void *data)
{
struct its_node *its = data;
@@ -4800,6 +4838,12 @@ static const struct gic_quirk its_quirks
@@ -4812,6 +4850,12 @@ static const struct gic_quirk its_quirks
#endif
#ifdef CONFIG_ROCKCHIP_ERRATUM_3588001
{
@ -140,7 +140,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
.desc = "ITS: Rockchip erratum RK3588001",
.iidr = 0x0201743b,
.mask = 0xffffffff,
@@ -5065,6 +5109,7 @@ static int __init its_probe_one(struct i
@@ -5077,6 +5121,7 @@ static int __init its_probe_one(struct i
{
u64 baser, tmp;
struct page *page;
@ -148,7 +148,7 @@ Subject: [PATCH] irqchip: gic-v3: add hackaround for rk3568 its
u32 ctlr;
int err;
@@ -5100,7 +5145,9 @@ static int __init its_probe_one(struct i
@@ -5112,7 +5157,9 @@ static int __init its_probe_one(struct i
}
}