// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
 * (http://www.friendlyelec.com)
 *
 * Copyright (c) 2023 Tianling Shen <cnsztl@immortalwrt.org>
 */

/dts-v1/;
#include <dt-bindings/input/input.h>
#include "rk3568-nanopi-common.dtsi"

/ {
	model = "FriendlyElec NanoPi R5C";
	compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&reset_button_pin>;

		button-reset {
			debounce-interval = <50>;
			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
			label = "reset";
			linux,code = <KEY_RESTART>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		sys_led: led-sys {
			gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
			label = "red:power";
			linux,default-trigger = "heartbeat";
			pinctrl-names = "default";
			pinctrl-0 = <&sys_led_pin>;
		};

		wan_led: led-wan {
			gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
			label = "green:wan";
			pinctrl-names = "default";
			pinctrl-0 = <&wan_led_pin>;
		};

		led_lan: led-lan {
			gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
			label = "green:lan";
			pinctrl-names = "default";
			pinctrl-0 = <&lan_led_pin>;
		};

		wlan_led: led-wlan {
			gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
			label = "green:wlan";
			pinctrl-names = "default";
			pinctrl-0 = <&wlan_led_pin>;
		};
	};
};

&pcie2x1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie20_reset_pin>;
	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&pcie3x1 {
	num-lanes = <1>;
	reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc3v3_pcie>;
	status = "okay";
};

&pcie3x2 {
	num-lanes = <1>;
	reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc3v3_pcie>;
	status = "okay";
};

&pinctrl {
	gpio-leds {
		sys_led_pin: sys-led-pin {
			rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		wan_led_pin: wan-led-pin {
			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		lan_led_pin: lan-led-pin {
			rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		wlan_led_pin: wlan-led-pin {
			rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	pcie {
		pcie20_reset_pin: pcie20-reset-pin {
			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	rockchip-key {
		reset_button_pin: reset-button-pin {
			rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};
};