25 lines
916 B
Diff
25 lines
916 B
Diff
From a6c71606de486944c5fb028f47604fb22292312b Mon Sep 17 00:00:00 2001
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From: Jon Lin <jon.lin@rock-chips.com>
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Date: Fri, 24 Jun 2022 21:32:11 +0800
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Subject: [PATCH] PCI: aspm_ext: Re-enable LRT for L1SS after power loss
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Change-Id: Iedb72ee74660a8f11f38895e06766c3b77728ba3
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Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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---
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drivers/pci/pcie/aspm_ext.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/drivers/pci/pcie/aspm_ext.c
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+++ b/drivers/pci/pcie/aspm_ext.c
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@@ -322,6 +322,10 @@ void pcie_aspm_ext_l1ss_enable(struct pc
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ret = rockchip_pcie_bus_aspm_enable_rc_ep(child, parent, false);
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if (enable) {
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+ /* LRT enable bits loss after wifi off, enable it after power on */
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+ if (parent->ltr_path)
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+ pcie_capability_set_word(parent, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_LTR_EN);
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+
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/* Enable RC then EP */
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aspm_calc_l1ss_info(child, parent);
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rockchip_pcie_bus_l1ss_enable_dev("RC", parent, enable);
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