target_linux_rockchip-6.x/patches-6.6/034-48-v6.10-drm-panthor-Fix-ordering-in-_irq_suspend.patch
sbwml ae3c1c2368 rockchip: backport panthor gpu driver
* rk3588

Signed-off-by: sbwml <admin@cooluc.com>
2024-07-07 21:39:51 +08:00

56 lines
2.2 KiB
Diff

From 1de434e0b2757061b09b347264f1ff5bdf996e58 Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Tue, 26 Mar 2024 12:12:04 +0100
Subject: [PATCH] drm/panthor: Fix ordering in _irq_suspend()
Make sure we set suspended=true last to avoid generating an irq storm
in the unlikely case where an IRQ happens between the suspended=true
assignment and the _INT_MASK update.
We also move the mask=0 assignment before writing to the _INT_MASK
register to prevent the thread handler from unmasking the interrupt
behind our back. This means we might lose events if there were some
pending when we get to suspend the IRQ, but that's fine.
The synchronize_irq() we have in the _irq_suspend() path was not
there to make sure all IRQs are processed, just to make sure we don't
have registers accesses coming from the irq handlers after
_irq_suspend() has been called. If there's a need to have all pending
IRQs processed, it should happen before _irq_suspend() is called.
v3:
- Add Steve's R-b
v2:
- New patch
Fixes: 5fe909cae118 ("drm/panthor: Add the device logical block")
Reported-by: Steven Price <steven.price@arm.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240326111205.510019-2-boris.brezillon@collabora.com
---
drivers/gpu/drm/panthor/panthor_device.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/panthor/panthor_device.h
+++ b/drivers/gpu/drm/panthor/panthor_device.h
@@ -325,7 +325,7 @@ static inline void panthor_ ## __name ##
{ \
int cookie; \
\
- atomic_set(&pirq->suspended, true); \
+ pirq->mask = 0; \
\
if (drm_dev_enter(&pirq->ptdev->base, &cookie)) { \
gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, 0); \
@@ -333,7 +333,7 @@ static inline void panthor_ ## __name ##
drm_dev_exit(cookie); \
} \
\
- pirq->mask = 0; \
+ atomic_set(&pirq->suspended, true); \
} \
\
static inline void panthor_ ## __name ## _irq_resume(struct panthor_irq *pirq, u32 mask) \